High-voltage transistors exhibit increased body current with increasing gate voltage for high drain-source voltage. The cause for this is the so-called Kirk effect that defines the area in which the component can be reliably operated (SOA, safe operating area), because a high body current causes an active breakdown. This effect can be reduced by gradually increasing the dopant profile toward the drain contact.
In US 2004/0175892 A1, a method is described in which the dopant is separated from a field oxide, in order to generate a graded dopant profile with an increasing dopant concentration toward the drain contact in the drift region in the horizontal direction relative to the top side of the substrate. This process is difficult to control and requires a production process with a field oxide, because otherwise additional complex processing steps are needed.
In WO 98/28797, it is described that the Kirk effect is reduced at the tips of drain contact areas which are structured like fingers, if the source area is absent in the area of the tips.
In the case of the method of WO 2006/136979 A2, tapering shallow trench isolation (STI) strips are used. The implantation of dopant into the drift region is performed with a smaller penetration depth in comparison with the depth of the STI area. In addition, the so-called dielectric RESURF effect (DIELER) is used. In this way, a relatively high breakdown voltage of typically approximately 35 V is achieved in a sub-micron CMOS process.